The AMANDA-B 1997 Raw Data Format The AMANDA-B 1997 raw data has a hierarchical structure. The highest level is the raw data files. The raw data files contain a variable length structure called a "record". There are three types of data records, configuration, event, and house keeping. The record delimiters (see Table 1) are not unique in the data stream, except for the End_of_Record delimiter. Therefore, a record delimiter can only recognized at the beginning of a file or after an End_of_Record delimiter. Each record has the general form shown in Table 2. Record Delimiters (Table 1) --------------------------- End_of_Record 0xffffffff Configuration 0x00000101 Event 0x00000001 House keeping 0x00000003 Record Form (Table 2) --------------------- Record type delimiter 4-bytes Record size 4-bytes ...contents... End_of_Record delimiter 4-bytes Each data file must start with a configuration record. The configuration uses 4-byte data words, and it is a direct write of the DAQ configuration data structure. The first word in the contents is the version number of the DAQ, which is equal to 0x00000001, or it is the creatation data of the DAQ in decimal form, yyyymmdd. The remaining contents are out of date. The AMANDA-B 1997 raw data does not contain house keeping records. The contents of the AMANDA-B 1997 Event record are 3-bytes words, which contain fixed length and variable length components, which are separated by delimiters of the form, 0xffffxx (see Appendix A). These 256 delimiters are unique in the AMANDA-B 1997 event data space (see note 1). The data following each delimiter is the raw data from the device indicated by the delimiter, with two exceptions. First, the 3377 data has been converted to the 2277 3-byte format, but the order is still the 3377 order. Second, the 7164 data has been compiled into a single block, indicated by the delimiter, "ADC7164". The lower 12-bits are the original ADC value, and the upper 11-bits contain the complete ADC channel number, which is (device_channel_number + (device_number << 4)). If I define a component to be a delimiter followed by the raw data from a device readout, then the format does not specify the order of the components. The end of a component is marked by the delimiter for the next component. The only exception is that end of an event is always the END_of_Event delimiter. The reader John and I wrote can accept an event with the components in any order. Note 1: AMANDA-B 1997 does not use the Leeds GPS clock, but it is used in AMANDA-A and AMANDA-B 1996. This clock has valid data in the event delimiter space, but it does not conflict with the END_of_Event delimiter, 0xffffff, and the clock component has a fixed length. Appendix A ---------- END_HDR 0x00ffffff /* End of this event. */ TDC0_HDR 0x00fffffe /* 3377 TDCs */ TDC1_HDR 0x00fffffd TDC2_HDR 0x00fffffc TDC3_HDR 0x00fffffb ADC0_HDR 0x00fffffa /* 7164 ADCs */ ADC1_HDR 0x00fffff9 ADC2_HDR 0x00fffff8 ADC3_HDR 0x00fffff7 ADC4_HDR 0x00fffff6 ADC5_HDR 0x00fffff5 ADC6_HDR 0x00fffff4 ADC7_HDR 0x00fffff3 CLK_HDR 0x00fffff2 /* Real time clock? */ IR_HDR 0x00fffff1 /* Interrupt register */ ATDC0_HDR 0x00fffff0 /* 2277 TDCs (alternate hardware) */ ATDC1_HDR 0x00ffffef ATDC2_HDR 0x00ffffee ATDC3_HDR 0x00ffffed EVTNO_HDR 0x00ffffeb /* software-inserted event number */ FADC0_HDR 0X00ffffea /* 4300B FERA ADC */ FADC1_HDR 0X00ffffe9 /* 4300B FERA ADC */ FADC2_HDR 0X00ffffe8 /* 4300B FERA ADC */ FADC3_HDR 0X00ffffe7 /* 4300B FERA ADC */ FADC4_HDR 0X00ffffe6 /* 4300B FERA ADC */ TDC_CONFIG_HDR 0X00ffffe5 /* 3377 TDC Configuration */ ATDC_CONFIG_HDR 0X00ffffe4 /* 2277 TDC Configuration */ ADC_CONFIG_HDR 0X00ffffe3 /* Phillips 7164 Peak ADC config */ FERA_CONFIG_HDR 0X00ffffe2 /* 4300B FERA Configuration */ SC_2551_HDR 0X00ffffe1 /* 2551 Scaler header */ TDC4_HDR 0x00ffffdf /* more 3377's */ TDC5_HDR 0x00ffffde TDC6_HDR 0x00ffffdd TDC7_HDR 0x00ffffdc TDC8_HDR 0x00ffffdb TDC9_HDR 0x00ffffda TDC10_HDR 0x00ffffd9 TDC11_HDR 0x00ffffd8 TDC12_HDR 0x00ffffd7 TDC13_HDR 0x00ffffd6 TDC14_HDR 0x00ffffd5 TDC15_HDR 0x00ffffd4 TDC16_HDR 0x00ffffd3 TDC17_HDR 0x00ffffd2 TDC18_HDR 0x00ffffd1 TDC19_HDR 0x00ffffd0 ATDC4_HDR 0x00ffffbf /* more 2277's */ ATDC5_HDR 0x00ffffbe ATDC6_HDR 0x00ffffbd ATDC7_HDR 0x00ffffbc ATDC8_HDR 0x00ffffbb ATDC9_HDR 0x00ffffba ATDC10_HDR 0x00ffffb9 ATDC11_HDR 0x00ffffb8 ATDC12_HDR 0x00ffffb7 ATDC13_HDR 0x00ffffb6 ATDC14_HDR 0x00ffffb5 ATDC15_HDR 0x00ffffb4 ATDC16_HDR 0x00ffffb3 ATDC17_HDR 0x00ffffb2 ATDC18_HDR 0x00ffffb1 ATDC19_HDR 0x00ffffb0 ADC8_HDR 0x00ffff9f /* MORE 7164 ADCs */ ADC9_HDR 0x00ffff9e ADC10_HDR 0x00ffff9d ADC11_HDR 0x00ffff9c ADC12_HDR 0x00ffff9b ADC13_HDR 0x00ffff9a ADC14_HDR 0x00ffff99 ADC15_HDR 0x00ffff98 ADC16_HDR 0x00ffff97 ADC17_HDR 0x00ffff96 ADC18_HDR 0x00ffff95 ADC19_HDR 0x00ffff94 ADC20_HDR 0x00ffff93 ADC21_HDR 0x00ffff92 ADC22_HDR 0x00ffff91 ADC23_HDR 0x00ffff90 TTGPS0_HDR 0x00ffff7f TTGPS1_HDR 0x00ffff7e DIGOM_HDR 0x00ffff60 /* digital OM event register */ MISC0_HDR 0x00ffff40 /* modules with no conversion */ MISC1_HDR 0x00ffff3f ADC7164 0x00ffff20 /* header for new ADC7164 format */ SAVEFLAG_HDR 0x00ffff10 /* next word indicates why the event was extracted */ LO_HDR 0x00ffff00 /* need to put a limit on these. */